1. Field of the Invention
The present invention pertains to the field of thin-film integrated circuit components, and, more specifically, to metal insulator semiconductors (xe2x80x9cMISxe2x80x9d) devices. Still more particularly, the MIS devices contain a ferroelectric material as the insulator.
2. Description of the Prior Art
Ferroelectric materials can be used as a gate insulator of metal oxide semiconductor field effect transistor (xe2x80x9cMOSFETxe2x80x9d) devices. In this application, the spontaneous polarization serves to modulate the gate-channel conduction. The channel conduction state can, for example, be utilized as an indicator of a memory storage state. Silicon substrates are the most commonly used types of substrates for these applications. A problem exists because the ferroelectric polarization phenomenon is greatly reduced or even completely dissipated when the ferroelectric materials are deposited directly on the silicon surface. This reduction in ferroelectric polarization can be observed as the distance between positive and negative direction switching curves on a hysteresis plot of capacitance versus bias voltage. A very small separation between the positive and negative switching curves will indicate a correspondingly small ferroelectric polarization. Conversely, a large separation indicates a correspondingly large polarization.
Metal oxide ferroelectric materials have traditionally required firing or annealing at very high temperatures to provide a lattice structure that is capable of exhibiting ferroelectric polarization. These high firing temperatures induce diffusion of compounds between adjacent thin-film layers. One aspect of this diffusion is thought to be the production of a low dielectric layer that is formed between the ferroelectric material and the silicon substrate. This low dielectric layer acts as a parasitic capacitor and screens the applied electric field by producing a surface charge that reduces the ability of the applied electric field to reach the ferroelectric material. The screening effect reduces the magnitude of polarization obtainable from the ferroelectric material. The parasitic ferroelectric capacitor effect varies with the applied field and, consequently, the amount of screening or effective field-drop across the ferroelectric capacitor varies with the applied field.
Prior attempts at producing MIS devices using a ferroelectric material as the insulator have produced devices having capacitance versus voltage curves that present numerous problems. As indicated above, a primary problem is a reduction in the ferroelectric polarization phenomenon, which may be completely dissipated. Another problem is that the capacitance versus voltage curves rise at a low angle, not a steep one. This low angle indicates switching of the material over a very wide voltage range. The low-angle rise makes it possible to partially switch the polarization state of the ferroelectric material with cumulative effect due to noise. Electronic memories containing low-angle rise ferroelectric materials would, therefore, be subject to noise-induced read errors. Of course, the lack of any polarization at all would make it impossible to use the material in a non-destructive readout MOSFET ferroelectric memory where the polarization state controls the gate current.
The present invention overcomes the above-identified problems by providing an improved ferroelectric MIS device (xe2x80x9cMFS or MFIS devicexe2x80x9d) that may be used in electronic memories. The improvements include capacitance versus voltage curves having a wide separation based on the polarization state of the ferroelectric material and the switching direction. Additionally, the capacitance versus voltage curves rise steeply to make the MIS device less sensitive to noise.
The MIS device includes a semiconducting substrate having a perovskite-like metal oxide layered superlattice material deposited thereon and an electrode formed above the layered superlattice material. Additionally, a buffer layer is interposed between the layered superlattice material and the semiconducting substrate, and the buffer layer may be capped with a silicon dioxide layer.
Preferred exemplary forms of the invention include the semiconducting substrate being formed of n-doped or p-doped silicon. The layered superlattice material is preferably a room-temperature ferroelectric composition made of strontium bismuth tantalate, strontium bismuth niobate, or strontium bismuth niobium tantalate. Other preferred ferroelectric compositions include those just mentioned in combination with a vanadium or tungsten moiety. The layered superlattice material preferably has a C-axis orientation that can be obtained by drying providing a liquid precursor having a plurality of metal moieties in effective amounts for yielding a layered superlattice material, applying the precursor to a substrate, drying the precursor in the presence of ultraviolet (xe2x80x9cUVxe2x80x9d) radiation, and annealing the dried precursor.
The device exhibits an extremely high level of ferroelectric capacitance versus voltage behavior. Results indicate that films of thicknesses less than 3000 xc3x85 or even 2000 xc3x85 have a window of separation between the steeply rising positively and negatively switched capacitance curves exceeding five volts.